Institute of Computer Science | ||
Publications Physical VLSI-Design Automation |
V. Schnecke, O. Vornberger
Hybrid Genetic Algorithms for Constrained Placement Problems
IEEE Transactions on Evolutionary Computation, Volume 1, Number 4, November 1997, pp. 266-277
Abstract, PDF
V. Schnecke
Genetic design of VLSI-layouts
in Genetic algorithms in engineering systems, P. J. Fleming, A. Zalzala (eds.), IEE Control Engineering Series 55, IEE, London, 1997, 229-253
V. Schnecke
Hybrid Genetic Algorithms for Solving Constrained Packing and Placement Problems
PhD Dissertation, University of Osnabrück, Dept. Mathematics/Computer Science, Dec 1996
Abstract
V. Schnecke, O. Vornberger
An Adaptive Parallel Genetic Algorithm for VLSI-Layout Optimization
Procs. 4th Int. Conf. on Parallel Problem Solving from Nature (PPSN IV), 22-27 Sep 1996, Springer LNCS 1141, 859-868
Abstract, HTML, PDF
V. Schnecke, O. Vornberger
A Genetic Algorithm for VLSI Physical Design Automation
Procs. Second Int. Conf. on Adaptive Computing in Engineering Design and Control, ACEDC '96, 26-28 Mar 1996, University of Plymouth, U.K., 53-58
Abstract, HTML, PDF
V. Schnecke, O. Vornberger
Layoutgenerierung mit genetischen Algorithmen
Tagungsband 7. E.I.S-Workshop, Entwurf Integrierter Schaltungen, 7./8. Nov. 1995, TU Chemnitz-Zwickau, 182-191
Abstract, HTML, PDF
V. Schnecke, O. Vornberger
Genetic Design of VLSI-Layouts
Procs. First IEE/IEEE Int. Conf. on Genetic Algorithms in Engineering Systems: Innovations and Applications, GALESIA 95, 12-14 Sep 1995, Sheffield, U.K., 430-435
Abstract, HTML, PDF
V. Schnecke, O. Vornberger
Design of VLSI-Layouts by Genetic Algorithm
Power Xplorer User Report, Parsytec GmbH, May 1995, 125-128
HTML, PDF
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