Institute of Computer Science
	Publications Volker Schnecke

V. Schnecke, O. Vornberger
Hybrid Genetic Algorithms for Constrained Placement Problems
IEEE Transactions on Evolutionary Computation, Volume 1, Number 4, November 1997, pp. 266-277
Abstract, PDF

V. Schnecke
Genetic design of VLSI-layouts
in Genetic algorithms in engineering systems, P. J. Fleming, A. Zalzala (eds.), IEE Control Engineering Series 55, IEE, London, 1997, 229-253

V. Schnecke
Hybrid Genetic Algorithms for Solving Constrained Packing and Placement Problems
PhD Dissertation, University of Osnabrück, Dept. Mathematics/Computer Science, Dec 1996
Abstract

V. Schnecke, O. Vornberger
An Adaptive Parallel Genetic Algorithm for VLSI-Layout Optimization
Procs. 4th Int. Conf. on Parallel Problem Solving from Nature (PPSN IV), 22-27 Sep 1996, Springer LNCS 1141, 859-868
Abstract, HTML, PDF

V. Schnecke, O. Vornberger
A Genetic Algorithm for VLSI Physical Design Automation
Procs. Second Int. Conf. on Adaptive Computing in Engineering Design and Control, ACEDC '96, 26-28 Mar 1996, University of Plymouth, U.K., 53-58
Abstract, HTML, PDF

V. Schnecke, O. Vornberger
Layoutgenerierung mit genetischen Algorithmen
Tagungsband 7. E.I.S-Workshop, Entwurf Integrierter Schaltungen, 7./8. Nov. 1995, TU Chemnitz-Zwickau, 182-191
Abstract, HTML, PDF

V. Schnecke, O. Vornberger
Genetic Design of VLSI-Layouts
Procs. First IEE/IEEE Int. Conf. on Genetic Algorithms in Engineering Systems: Innovations and Applications, GALESIA 95, 12-14 Sep 1995, Sheffield, U.K., 430-435
Abstract, HTML, PDF

V. Schnecke
Portable Parallelprogrammierung mit PVM
unix/mail, Heft 3/95, Carl Hanser Verlag (München), 144-149
Abstract, HTML, PDF

V. Schnecke, O. Vornberger
Design of VLSI-Layouts by Genetic Algorithm
Power Xplorer User Report, Parsytec GmbH, May 1995, 125-128
HTML, PDF

A. Reinefeld, V. Schnecke
Portability versus Efficiency? - Parallel Applications on PVM and Parix
Proceedings ZEUS '95, Workshop on Parallel Programming and Computation, Linköping, Sweden, May 17-18, 1995, 35-49
Abstract, HTML, PDF

A. Reinefeld, V. Schnecke
Performance of PVM on a Highly Parallel Transputer System
First European PVM Users' Group Meeting, Rome, Italy, Oct. 9-11, 1994
Abstract, HTML, PDF

V. Schnecke
Iterative Tiefensuche auf einem massiv parallelen System
Parallele Datenverarbeitung aktuell: TAT'94, IOS Press, 1994, 178-187
Abstract, HTML, PDF

A. Reinefeld, V. Schnecke
Work Load Balancing in Highly Parallel Depth-First Search
Proceedings Scalable High Performance Computing Conference SHPCC'94, Knoxville, Tennessee, IEEE Comp. Sc. Press (1994), 773-780
Abstract, HTML, PDF

A. Reinefeld, V. Schnecke
AIDA* - Asynchronous Parallel IDA*
Proceedings 10th Canadian Conference on Artificial Intelligence, AI'94, May 1994, Banff, Canada, 295-302
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V. Schnecke
Iterative Tiefensuche auf einem massiv parallelen System
Diplomarbeit, Universität-GH Paderborn, Paderborn Center for Parallel Computing
PDF